View LTC1751_226269.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Final Electrical Specifications
LTC1751/LTC1751-3.3/LTC1751-5 Micropower, Regulated Charge Pump DC/DC Converters
September 2000
FEATURES
s s s s s s s s s s s s s
DESCRIPTIO
5V Output Current: 100mA (VIN 3V) 3.3V Output Current: 80mA (VIN 2.5V) Ultralow Power: 20A Quiescent Current Regulated Output Voltage: 3.3V 4%, 5V 4%, ADJ VIN Range: 2V to 5.5V 800kHz Switching Frequency No Inductors Very Low Shutdown Current: <2A Shutdown Disconnects Load from VIN PowerGood/Undervoltage Output Adjustable Soft-Start Time Short-Circuit/Thermal Protection Available in 8-Pin MSOP
The LTC(R)1751 family of products are micropower charge pump DC/DC converters that produce a regulated output voltage. The input voltage range is 2V to 5.5V. Extremely low operating current (20A typical with no load) and low external parts count (one flying capacitor and two small bypass capacitors at VIN and VOUT) make them ideally suited for small, battery-powered applications. The LTC1751 family operate as Burst ModeTM switched capacitor voltage doublers to achieve ultralow quiescent current. They have thermal shutdown capability and can survive a continuous short circuit from VOUT to GND. The PGOOD pin on the LTC1751-3.3 and LTC1751-5 indicates when the output voltage has reached its final value and if the output has an undervoltage fault condition. The FB pin of the adjustable LTC1751 can be used to program the desired output voltage or current. An optional soft-start capacitor may be used at the SS pin to prevent excessive inrush current during start-up. The LTC1751 family is available in an 8-pin MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a trademark of Linear Technology Corporation.
APPLICATIO S
s s s s s s
SIM Interface Supplies for GSM Cellular Telephones Li-Ion Battery Backup Supplies Local 3V and 5V Conversion Smart Card Readers PCMCIA Local 5V Supplies White LED Backlighting
TYPICAL APPLICATIO
Regulated 5V Output from a 2.7V to 5.5V Input
VIN 2.7V TO 5.5V 3 C2 10F 7 2 R1 100k VOUT 5V 4% C1 I 100mA, VIN 3V 10F OUT IOUT 50mA, VIN 2.7V
OUTPUT VOLTAGE (V)
5.1
VIN
VOUT
ON OFF
CSS 4.7nF
1 SHDN PGOOD LTC1751-5 8 6 SS C+ 4 GND C-
1751 TA01
PGOOD
5
CFLY 1F
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
Output Voltage vs Input Voltage
5.2 IOUT = 50mA CFLY = 1F COUT = 10F 5.0 TA = 85C TA = 25C TA = -40C 4.9 4.8 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5
1751 TA02
U
U
1
LTC1751/LTC1751-3.3/LTC1751-5
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW FB/PGOOD* VOUT VIN GND 1 2 3 4 8 7 6 5 SS SHDN C+ C-
VIN to GND .................................................. - 0.3V to 6V PGOOD, FB, VOUT to GND ........................... - 0.3V to 6V SS, SHDN to GND ........................ - 0.3V to (VIN + 0.3V) VOUT Short-Circuit Duration ............................. Indefinite IOUT (Note 2)....................................................... 125mA Operating Temperature Range (Note 3) .. - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
ORDER PART NUMBER LTC1751EMS8 LTC1751EMS8-3.3 LTC1751EMS8-5 MS8 PART MARKING LTKL LTKN LTKP
MS8 PACKAGE 8-LEAD PLASTIC MSOP
TJMAX = 150C, JA = 160C/W *PGOOD ON LTC1751-3.3/LTC1751-5 FB ON LTC1751
Consult factory for Industrial and Military grade parts.
The q denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. CFLY = 1F, CIN = 10F, COUT = 10F unless otherwise noted.
SYMBOL LTC1751-3.3 VIN VOUT ICC VR fOSC LTC1751-5 VIN VOUT ICC VR fOSC LTC1751 VIN ICC VFB IFB ROUT Input Supply Voltage Operating Supply Current FB Regulation Voltage FB Input Current Open-Loop Charge Pump Strength 2V VIN 5.5V, IOUT = 0mA, SHDN = VIN (Note 4 ) 2V VIN 5.5V, IOUT 20mA VFB = 1.3V VIN = 2V, VOUT = 3.3V (Note 5) VIN = 2.7V, VOUT = 5V (Note 5)
q q q q q q
ELECTRICAL CHARACTERISTICS
PARAMETER Input Supply Voltage Output Voltage Operating Supply Current Output Ripple Efficiency Switching Frequency Input Supply Voltage Output Voltage Operating Supply Current Output Ripple Efficiency Switching Frequency
CONDITIONS
q
MIN 2 3.17 3.17
TYP
MAX 4.4
UNITS V V V A mVP-P % kHz
2V VIN 4.4V, IOUT 40mA 2.5V VIN 4.4V, IOUT 80mA 2V VIN 4.4V, IOUT = 0mA, SHDN = VIN VIN = 2.5V, IOUT = 40mA VIN = 2V, IOUT = 40mA Oscillator Free Running
q q q
3.3 3.3 18 68 80 800
3.43 3.43 40
q
2.7 4.8 4.8 5 5 20 75 82 800 2 16 1.157 - 50 8.5 6.0 1.205
5.5 5.2 5.2 50
2.7V VIN 5.5V, IOUT 50mA 3V VIN 5.5V, IOUT 100mA 2.7V VIN 5.5V, IOUT = 0mA, SHDN = VIN VIN = 3V, IOUT = 50mA VIN = 3V, IOUT = 50mA Oscillator Free Running
q q q
mVP-P % kHz 5.5 40 1.253 50 20 12 V A V nA
2
U
V V V A
W
U
U
WW
W
LTC1751/LTC1751-3.3/LTC1751-5
The q denotes specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25C. CFLY = 1F, CIN = 10F, COUT = 10F unless otherwise noted.
SYMBOL UVL UVH VOL IOH ISHDN VIH VIL IIH IIL tr PARAMETER PGOOD Undervoltage Low Threshold PGOOD Low Output Voltage PGOOD High Output Leakage Shutdown Supply Current SHDN Input Threshold (High) SHDN Input Threshold (Low) SHDN Input Current (High) SHDN Input Current (Low) VOUT Rise Time SHDN = VIN SHDN = 0V VIN = 3V, IOUT = 0mA, 10% to 90% (Note 6) CONDITIONS Relative to Regulated VOUT (Note 6) IPGOOD = - 500A VPGOOD = 5.5V VIN 3.6V, VOUT = 0V, VSHDN = 0V 3.6V < VIN, VOUT = 0V, VSHDN = 0V
q q q q q q q q q q
ELECTRICAL CHARACTERISTICS
MIN -11 -8
TYP -7 - 4.5
MAX -3 -2 0.4 1
UNITS % % V A A A V V A A sec
LTC1751-3.3/LTC1751-5 PGOOD Undervoltage High Threshold Relative to Regulated VOUT (Note 6)
LTC1751/LTC1751-3.3/LTC1751-5 0.01 1.5 0.3 -1 -1 0.6ms/nF * CSS 1 1 2 5
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Based on long term current density limitations. Note 3: The LTC1751EMS8-X is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls.
Note 4: The no load input current will be approximately ICC plus twice the standing current in the resistive output divider. Note 5: ROUT (2VIN - VOUT)/IOUT. Note 6: See Figure 2.
TYPICAL PERFOR A CE CHARACTERISTICS
(LTC1751-3.3)
Output Voltage vs Load Current
3.40 TA = 25C CFLY = 1F
OUTPUT VOLTAGE (V)
TA = 25C TA = 85C
SUPPLY CURRENT (A)
OUTPUT VOLTAGE (V)
3.35
3.30 VIN = 2V 3.25
VIN = 2.5V
3.20 0 25 50 75 100 LOAD CURRENT (mA) 125 150
1751 G01
UW
Output Voltage vs Input Voltage
3.40 IOUT = 40mA CFLY = 1F COUT = 10F 40
No Load Supply Current vs Input Voltage
IOUT = 0mA CFLY = 1F VSHDN = VIN TA = 85C 20 TA = 25C TA = -40C 10
3.35
TA = -40C
30
3.30
3.25
3.20 2.0
2.5
3.5 4.0 3.0 INPUT VOLTAGE (V)
4.5
1751 G02
0 2.0
2.5
3.5 4.0 3.0 INPUT VOLTAGE (V)
4.5
1751 G03
3
LTC1751/LTC1751-3.3/LTC1751-5 TYPICAL PERFOR A CE CHARACTERISTICS
(LTC1751-3.3)
Power Efficiency vs Load Current
100 TA = 25C 90 CFLY = 1F = 10F C 80 OUT 70 60 50 40 30 20 10 0 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) 100
1751 G04
EFFICIENCY (%)
VIN = 2.75V VIN = 3.3V VIN = 4.4V
OUTPUT CURRENT (mA)
Start-Up
SHDN 2V/DIV PGOOD 5V/DIV
VOUT 1V/DIV
CSS = 10nF
2ms/DIV
(LTC1751-5)
Output Voltage vs Output Current
5.2 TA = 25C CFLY = 1F
SUPPLY CURRENT (A)
OUTPUT VOLTAGE (V)
5.1
5.0
4.9
4.8
0
4
UW
1751 G06
Short-Circuit Output Current vs Input Voltage
250 TA = 25C CFLY = 1F
VIN = 2V
200
150
100
50 2.0
2.5
3.5 4.0 3.0 INPUT VOLTAGE (V)
4.5
1751 G05
Output Ripple
Load Transient Response
IOUT 40mA/DIV VOUT AC COUPLED 50mV/DIV VOUT AC COUPLED 50mV/DIV
VIN = 2.5V IOUT = 80mA COUT = 10F
5s/DIV
1751 G07
VIN = 2.5V
50s/DIV
1751 G08
No Load Supply Current vs Input Voltage
40 CFLY = 1F IOUT = 0 VSHDN = VIN TA = 85C 20 TA = 25C TA = -40C 10
30
VIN = 3V VIN = 2.7V
100 150 50 OUTPUT CURRENT (mA)
200
1751 G09
0 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5
1751 G10
LTC1751/LTC1751-3.3/LTC1751-5 TYPICAL PERFOR A CE CHARACTERISTICS
(LTC1751-5)
Power Efficiency vs Load Current
100 TA = 25C 90 CFLY = 1F COUT = 10F 80 70 60 50 40 30 20 10 0 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) 100
1751 G11
EFFICIENCY (%)
VIN = 4.1V VIN = 5.5V
OUTPUT CURRENT (mA)
Start-Up
SHDN 2V/DIV PGOOD 5V/DIV VOUT 2V/DIV VOUT AC COUPLED 50mV/DIV
CSS = 10nF
2ms/DIV
PI FU CTIO S
PGOOD (Pin 1) (LTC1751-3.3/LTC1751-5): Output Voltage Status Indicator. On start-up, this open-drain pin remains low until the output voltage, VOUT, is within 4.5% (typ) of its final value. Once VOUT is valid, PGOOD becomes high-Z. If, due to a fault condition, VOUT falls 7% (typ) below its correct regulation level, PGOOD pulls low. PGOOD may be pulled up through an external resistor to any appropriate reference level. FB (Pin 1) (LTC1751): The voltage on this pin is compared to the internal reference voltage (1.205V) by the error amplifier to keep the output in regulation. An external resistor divider is required between VOUT and FB to program the output voltage. VOUT (Pin 2): Regulated Output Voltage. For best performance, VOUT should be bypassed with a 6.8F (min) low ESR capacitor as close to the pin as possible . VIN (Pin 3): Input Supply Voltage. VIN should be bypassed with a 6.8F (min) low ESR capacitor. GND (Pin 4): Ground. Should be tied to a ground plane for best performance. C - (Pin 5): Flying Capacitor Negative Terminal. C + (PIN 6): Flying Capacitor Positive Terminal. SHDN (Pin 7): Active Low Shutdown Input. A low on SHDN disables the device. SHDN must not be allowed to float. SS (Pin 8): Soft-Start Programming Pin. A capacitor on SS programs the start-up time of the charge pump so that large start-up input current is eliminated.
UW
1751 G13
Short-Circuit Output Current vs Input Voltage
250 TA = 25C CFLY = 1F
VIN = 2.7V
200
150
100
50 2.0 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5
1751 G12
Output Ripple
Load Transient Response
IOUT 50mA/DIV
VOUT AC COUPLED 50mV/DIV
VIN = 3V IOUT = 100mA COUT = 10F
5s/DIV
1751 G14
VIN = 3V
50s/DIV
1751 G15
U
U
U
5
LTC1751/LTC1751-3.3/LTC1751-5
SI PLIFIED BLOCK DIAGRA S
LTC1751-3.3/LTC1751-5
READY
PGOOD
1
UNDERV
VOUT
2
COMP1
CHARGE PUMP VIN 3 6 C+
GND
4
LTC1751
FB
1
VOUT
2
COMP1
CHARGE PUMP VIN 3 6 C+
GND
4
6
-
+
+
-
+
-
W
W
+ -
-+
2A 8 SS
-+
VREF
CONTROL
7
SHDN
5
C-
1751 BD1
2A 8 SS
VREF
CONTROL
7
SHDN
5
C-
1751 BD2
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
Operation (Refer to Simplified Block Diagrams) The LTC1751 family uses a switched capacitor charge pump to boost VIN to a regulated output voltage. Regulation is achieved by sensing the output voltage through an internal resistor divider and enabling the charge pump when the divided output drops below the lower trip point of COMP1. When the charge pump is enabled, a 2-phase nonoverlapping clock activates the charge pump switches. The flying capacitor is charged to VIN on phase 1 of the clock. On phase 2 of the clock, it is stacked in series with VIN and connected to VOUT. This sequence of charging and discharging the flying capacitor continues at the clock frequency until the divided output voltage reaches the upper trip point of COMP1. Once this happens the charge pump is disabled. When the charge pump is disabled the device typically draws less than 20A from VIN thus providing high efficiency under low load conditions. In shutdown mode all circuitry is turned off and the LTC1751 draws only leakage current from the VIN supply. Furthermore, VOUT is disconnected from VIN. The SHDN pin is a CMOS input with a threshold voltage of approximately 0.8V. The LTC1751 is in shutdown when a logic low is applied to the SHDN pin. The quiescent supply current of the LTC1751 will be slightly higher if the SHDN pin is driven high with a voltage that is below VIN than if it is driven all the way to VIN. Since the SHDN pin is a high impedance CMOS input it should never be allowed to float. To ensure that its state is defined it must always be driven with a valid logic level. Power Efficiency The efficiency () of the LTC1751 family is similar to that of a linear regulator with an effective input voltage of twice the actual input voltage. This occurs because the input current for a voltage doubling charge pump is approximately twice the output current. In an ideal regulated doubler the power efficiency would be given by:
= POUT VOUT * IOUT VOUT = = PIN VIN * 2IOUT 2VIN
U
At moderate to high output power, the switching losses and quiescent current of the LTC1751 are negligible and the expression is valid. For example, an LTC1751-5 with VIN = 3V, IOUT = 50mA and VOUT regulating to 5V, has a measured efficiency of 82% which is in close agreement with the theoretical 83.3% calculation. The LTC1751 product family continues to maintain good efficiency even at fairly light loads because of its inherently low power design. Short-Circuit/Thermal Protection During short-circuit conditions, the LTC1751 will draw between 200mA and 400mA from VIN causing a rise in the junction temperature. On-chip thermal shutdown circuitry disables the charge pump once the junction temperature exceeds approximately 160C and re-enables the charge pump once the junction temperature drops back to approximately 150C. The device will cycle in and out of thermal shutdown indefinitely without latchup or damage until the short circuit on VOUT is removed. VIN, VOUT Capacitor Selection The style and value of capacitors used with the LTC1751 family determine several important parameters such as output ripple, charge pump strength and minimum start-up time. To reduce noise and ripple, it is recommended that low ESR (< 0.1) capacitors be used for both CIN and COUT. These capacitors should be either ceramic or tantalum and should be 6.8F or greater. Aluminum capacitors are not recommended because of their high ESR. If the source impedance to VIN is very low, up to several megahertz, CIN may not be needed. Alternatively, a somewhat smaller value of input capacitor may be adequate, but will not be as effective in preventing ripple on the VIN pin. The value of COUT controls the amount of output ripple. Increasing the size of COUT to 10F or greater will reduce the output ripple at the expense of higher minimum turn on time and higher start-up current. See the section Output Ripple.
W
UU
7
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
Flying Capacitor Selection
The flying capacitor controls the strength of the charge pump. In order to achieve the rated output current, it is necessary to have at least 0.6F of capacitance for the flying capacitor. Capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a ceramic capacitor made of X7R material will retain most of its capacitance from - 40C to 85C, whereas, a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a very strong voltage coefficient causing them to lose 50% or more of their capacitance when the rated voltage is applied. The capacitor manufacturer's data sheet should be consulted to determine what value of capacitor is needed to ensure 0.6F at all temperatures and voltages. Generally an X7R ceramic capacitor is recommended for the flying capacitor with a minimum value of 1F. For very low load applications, it may be reduced to 0.01F-0.68F. A smaller flying capacitor delivers less charge per clock cycle to the output capacitor resulting in lower output ripple. The output ripple is reduced at the expense of maximum output current and efficiency. The theoretical minimum output resistance of a voltage doubling charge pump is given by:
ROUT (MIN) 2VIN - VOUT 1 = IOUT fC
Where f if the switching frequency and C is the value of the flying capacitor. (Using units of MHz and F is convenient since they cancel each other.) Note that the charge pump will typically be weaker than the theoretical limit due to additional switch resistance. However, for light load applications, the above expression can be used as a guideline in determining a starting capacitor value. Output Ripple Low frequency regulation mode ripple exists due to the hysteresis in the sense comparator and propagation delays in the charge pump control circuits. The amplitude and frequency of this ripple are heavily dependent on the
8
U
load current, the input voltage and the output capacitor size. For large VIN the ripple voltage can become substantial because the increased strength of the charge pump causes fast edges that may outpace the regulation circuitry. In some cases, rather than bursting, a single output cycle may be enough to boost the output voltage into or possibly beyond regulation. In these cases the average output voltage will climb slightly. For large input voltages a larger output capacitor will ensure that bursting always occurs, thus mitigating possible DC problems. Generally the regulation ripple has a sawtooth shape associated with it. A high frequency ripple component may also be present on the output capacitor due to the charge transfer action of the charge pump. In this case, the output can display a voltage pulse during the output-charging phase. This pulse results from the product of the charging current and the ESR of the output capacitor. It is proportional to the input voltage, the value of the flying capacitor and the ESR of the output capacitor. For example, typical combined output ripple for an LTC1751-5 with VIN = 3V under maximum load is 75mVP-P with a low ESR 10F output capacitor. A smaller output capacitor and/or larger output current load will result in higher ripple due to higher output voltage slew rates. There are several ways to reduce output voltage ripple. For applications requiring VIN to exceed 3.3V or for applications requiring < 100mV of peak-to-peak ripple, a larger COUT capacitor (22F or greater) is recommended. A larger capacitor will reduce both the low and high frequency ripple due to the lower charging and discharging slew rates as well as the lower ESR typically found with higher value (larger case size) capacitors. A low ESR ceramic output capacitor will minimize the high frequency ripple, but will not reduce the low frequency ripple unless a high capacitance value is used. An R-C filter may also be used to reduce high frequency voltages spikes (see Figure 1). Note that when using a larger output capacitor the minimum turn-on time of the device will increase.
W
UU
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
1 VOUT LTC1751-X
+
10F TANT
+
VOUT 5V 10F TANT
1751 F01
Figure 1. Output Ripple Reduction Technique
Soft-Start The LTC1751 family has built-in soft-start circuitry to prevent excessive current flow at VIN during start-up. The soft-start time is programmed by the value of the capacitor at the SS pin. Typically a 2A current is forced out of SS causing a ramp voltage on the SS pin. The regulation loop follows this ramp voltage until the output reaches the correct regulation level. SS is automatically pulled to ground whenever SHDN is low. The typical rise time is given by the expression: tr = 0.6ms/nF * CSS For example, with a 4.7nF capacitor the 10% to 90% rise time will be approximately 2.8ms. If the output charge storage capacitor is 10F, then the average output current for an LTC1751-5 will be 4V/2.8ms * 10F or 14mA, giving 28mA at the VIN pin. The soft-start feature is optional. If there is no capacitor on SS, the output voltage of the LTC1751 will ramp up as quickly as possible. The start-up time will depend on various parameters such as temperature, output loading,
SHDN PGOOD
VOUT
90%
10% TIME
17515 F02
Figure 2. PGOOD During Start-Up and Undervoltage
U
charge pump and flying capacitor values and input voltage. PGOOD and Undervoltage Detection The PGOOD pin on the LTC1751-3.3/LTC1751-5 performs two functions. On start-up, it indicates when the output has reached its final regulation level. After start-up, it indicates when a fault condition, such as excessive loading, has pulled the output out of regulation. Once the LTC1751-3.3/LTC1751-5 are enabled via the SHDN pin, VOUT ramps to its final regulation value slowly by following the SS pin. The PGOOD pin switches from low impedance to high impedance after VOUT reaches its regulation value. If VOUT is subsequently pulled below its correct regulation level, the PGOOD pin pulls low again indicating that a fault exists. Alternatively, if there is a short circuit on VOUT preventing it from ever reaching its correct regulation level, the PGOOD pin will remain low. The lower fault threshold, UVL, is preprogrammed to recognize errors of - 7% below nominal VOUT. The upper fault threshold, UVH, is preprogrammed at - 5% below nominal. Figure 2 shows an example of the PGOOD pin with a normal start-up followed by an undervoltage fault. Using an external pull-up resistor, the PGOOD pin can be pulled high from any available voltage supply, including the LTC1751-3.3/LTC1751-5 VOUT pin. If PGOOD is not used it may be connected to GND.
tr UVL UVH
W
UU
9
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
Programming the LTC1751 Output Voltage (FB Pin) While the LTC1751-3.3/LTC1751-5 versions have internal resistive dividers to program the output voltage, the programmable LTC1751 may be set to an arbitrary voltage via an external resistive divider. Since it employs a voltage doubling charge pump, it is not possible to achieve output voltages greater than twice the available input voltage. Figure 3 shows the required voltage divider connection. The voltage divider ratio is given by the expression: R1 V = OUT - 1 R2 1.205V The sum of the voltage divider resistors can be made large to keep the quiescent current to a minimum. Any standing current in the output divider (given by 1.205V/R2) will be reflected by a factor of 2 in the input current. Typical values for total voltage divider resistance can range from several ks up to 1M.
VOUT FB GND
1751 F03
2 R1 1 R2 4
VOUT 1.205V 1 + R1 R2 COUT
()
OUTPUT RESISTANCE ()
Figure 3. Programming the Adjustable LTC1751
10
U
Maximum Available Output Current For the adjustable LTC1751, the maximum available output current and voltage can be calculated from the effective open-loop output resistance, ROUT, and effective output voltage, 2VIN(MIN).
ROUT
W
UU
+
VOUT
+ -
2VIN
-
1751 F04
Figure 4. Equivalent Open-Loop Circuit
From Figure 4 the available current is given by:
IOUT =
2VIN - VOUT ROUT
Typical ROUT values as a function of input voltage are shown in Figure 5.
10 TA = 25C CFLY = 1F
8 IOUT = 100mA 6 IOUT = 50mA 4
2
0 2.0
2.5
3.5 4.0 3.0 INPUT VOLTAGE (V)
4.5
1751 F05
Figure 5. Typical ROUT vs Input Voltage
LTC1751/LTC1751-3.3/LTC1751-5
APPLICATIO S I FOR ATIO
Layout Considerations Due to high switching frequency and high transient currents produced by the LTC1751 product family, careful board layout is necessary. A true ground plane and short connections to all capacitors will improve performance and ensure proper regulation under all conditions. Figure 6 shows the recommended layout configuration.
VIN
VOUT
GND
17515 F03
Figure 6. Recommended Layout
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102)
0.007 (0.18) 0.021 0.006 (0.53 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
U
Thermal Management For higher input voltages and maximum output current, there can be substantial power dissipation in the LTC1751. If the junction temperature increases above approximately 160C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting the GND pin (Pin 4) to a ground plane, and maintaining a solid ground plane under the device on two layers of the PC board, will reduce the thermal resistance of the package and PC board system considerably.
SHDN
8 76 5 0.193 0.006 (4.90 0.15) 0.118 0.004** (3.00 0.102) 1 0.040 0.006 (1.02 0.15) 0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) BSC 23 4 0.034 0.004 (0.86 0.102) 0.006 0.004 (0.15 0.102)
MSOP (MS8) 1098
U
W
UU
11
LTC1751/LTC1751-3.3/LTC1751-5
TYPICAL APPLICATIO U
C4 1F 6 3V TO 4.5V Li-Ion BATTERY C1 10F VSHDN 17ms 3 C+ VIN SHDN SS C3 680pF 5 C- VOUT LTC1751 FB GND 2 C2 10F 82 82 82 82 82
1751 TA03
Current Mode White or Blue LED Driver with PWM Brightness Control
UP TO 6 LEDS
7 8
1 4
t
82
RELATED PARTS
PART NUMBER LTC1144 LTC1262 LTC1514/LTC1515 LTC1516 LTC1517-5/LTC1517-3.3 LTC1522 LTC1555/LTC1556 LTC1682 LTC1754-5 LTC1755 DESCRIPTION Charge Pump Inverter with Shutdown 12V, 30mA Flash Memory Prog. Supply Buck/Boost Charge Pumps with IQ = 60A Micropower 5V Charge Pump Micropower 5V/3.3V Doubler Charge Pumps Micropower 5V Doubler Charge Pump SIM Card Interface Low Noise Doubler Charge Pump Micropower 5V Doubler Charge Pump Smart Card Interface COMMENTS VIN = 2V to 18V, 15V to -15V Supply Regulated 12V 5% Output, IQ = 500A 50mA Output at 3V, 3.3V or 5V; 2V to 10V Input IQ = 12A, Up to 50mA Output, VIN = 2V to 5V IQ = 6A, Up to 20mA Output IQ = 6A, Up to 20mA Output Step-Up/Step-Down Charge Pump, VIN = 2.7V to 10V Output Noise = 60VRMS, 2.5V to 5.5V Output IQ = 13A, Up to 50mA Output, SOT-23 Package Buck/Boost Charge Pump, IQ = 60A, VIN = 2.7V to 6V
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
1751i LT/LCG 0900 4K * PRINTED IN USA
(c) LINEAR TECHNOLOGY CORPORATION 2000

▲Up To Search▲

Price & Availability of LTC1751

	To Download LTC1751 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .